Hardware

Quantum Computing
Hardware

A quantum algorithm is only as powerful as the hardware that runs it. Every qubit technology makes different trade-offs between coherence time, gate speed, connectivity, and scalability — and every trade-off has direct consequences for cryptography. Google achieved the first verifiable quantum advantage in October 2025. IBM is targeting verified quantum advantage by end of 2026 with its Nighthawk processor. Understanding what today's hardware can and cannot do is essential for honest assessment of the quantum threat timeline.

Superconducting Qubits Trapped Ions Photonic Qubits Neutral Atoms Topological Qubits Decoherence Error Correction

Physical Implementations of Qubits

QUBIT PLATFORM COMPARISON — 2025–2026 STATE OF THE ART PLATFORM QUBIT TYPE COHERENCE TIME GATE SPEED TWO-QUBIT FIDELITY SCALE (2025–26) TEMP. REQUIRED Superconducting IBM (Nighthawk) Google (Willow) Transmon circuit Josephson junction 350 μs T1 (Nighthawk) Willow: 100 μs 5× improvement over Sycamore 10–50 ns fastest gate class 99.88% (Willow) 99.97% single-qubit 99.5% readout 120 Q (Nighthawk) 105 Q Willow ↑ 300mm fab → faster scaling ~15 mK dilution refrigerator Trapped Ion Quantinuum (Helios) IonQ (Tempo) Individual atoms laser-trapped ions Seconds to minutes orders of magnitude longer than superconducting 1–100 ms 1000× slower than SC 99.92% (Helios) Oxford Ionics: 99.99% SPAM fidelity: 99.95% 98 Q (Helios) IonQ Tempo: 100 Q (gen 5) all-to-all connectivity Room temp (detectors ~4 K) Neutral Atom QuEra, Pasqal Google (new, Mar 2026) Neutral atoms in optical tweezer arrays Seconds hyperfine states long-lived ~100 ns–1 ms Rydberg gate ~1 μs 99.98% single-qubit arrays of 6100+ atoms rapidly improving 6100+ physical qubits reconfigurable 2D arrays 50–100× circuit speedups shown ~μK (laser trap) UHV chamber, no cryo Photonic Xanadu, PsiQuantum QuiX Quantum Photons (polarisation, path, time-bin) ∞ (no decay) photons don't decohere Sub-ns speed of light operations Variable photon loss dominant error 216 modes (Borealis) PsiQuantum Omega: target 1M Room temp (detectors ~2 K) Topological Microsoft (Majorana 1, Feb 2025) Majorana zero modes InAs/Al nanowires Theoretically ∞ topology-protected (not yet demonstrated) Not yet benchmarked Not yet benchmarked Nature reviewers dispute MZM evidence claim 8 topological qubits roadmap to 27×13 array target: 1M Q on one chip ~mK dilution refrigerator
Five active qubit platforms compared on 2025–2026 figures. Superconducting leads on speed and scale; IBM Nighthawk reaches T1 of 350 μs with 120 qubits fabricated on 300mm wafers. Trapped ions lead on fidelity: Quantinuum Helios achieved 99.92% two-qubit gate fidelity and Oxford Ionics reached 99.99%. Neutral atoms emerged as a major force in 2026, with Google launching a new neutral-atom program (March 2026) alongside its superconducting effort. Topological qubits remain contested: Microsoft's February 2025 Majorana 1 announcement faced pushback from Nature's own reviewers.

Superconducting Qubits — IBM Nighthawk & Google Quantum Echoes

Google Willow 105-qubit superconducting quantum chip held in a gloved hand
Google's Willow chip — a 105-qubit superconducting processor small enough to hold in a gloved hand, yet capable of completing benchmark computations no classical supercomputer could feasibly replicate. Released December 2024, Willow was the first chip to demonstrate below-threshold quantum error correction and, in October 2025, ran the Quantum Echoes algorithm 13,000× faster than the world's fastest classical supercomputers — the first verifiable quantum advantage in history. Source: Google Quantum AI Blog — Our Quantum Echoes algorithm, October 22, 2025

IBM Nighthawk and the Road to Quantum Advantage

IBM's Nighthawk processor, released to IBM Quantum cloud users in January 2026, represents the current state of the art in superconducting quantum computing. Its 120 qubits connect via 218 next-generation tunable couplers in a square lattice — 20% more connectivity than its predecessor Heron. This allows circuits 30% more complex to run at low error rates, enabling algorithms with up to 5,000 two-qubit gates. IBM projects 7,500 gates by end of 2026 and 10,000 by 2027, with 1,000+ qubit modular systems using long-range couplers planned for 2028.

The Loon companion chip (also announced November 2025) is a smaller 112-qubit experimental processor that validates all the hardware elements of fault-tolerant quantum computing: multi-layer routing, long-range couplers for distant qubit connections, and fast qubit reset circuits. Together, Nighthawk and Loon represent IBM's near-term and long-term quantum strategy respectively. IBM's classical error syndrome decoder — implemented on an AMD FPGA — now processes error syndromes in under 480 nanoseconds, a 10× speedup over previous approaches and one year ahead of schedule.

Google Quantum Echoes (October 2025) was the first demonstration of verifiable quantum advantage: the Willow chip ran the Quantum Echoes algorithm (out-of-time-order correlators) 13,000 times faster than the best classical supercomputers on a computation that is independently verifiable on another quantum device. Unlike the 2019 Random Circuit Sampling benchmark — which produced outputs with no direct scientific value — Quantum Echoes measured molecular geometry in collaboration with UC Berkeley researchers, demonstrating that quantum computation can produce useful, reproducible, real-world results. Google's Willow array delivered single-qubit fidelity of 99.97%, two-qubit fidelity of 99.88%, and readout fidelity of 99.5% across all 105 qubits simultaneously.

Google CEO Sundar Pichai standing beside the dilution refrigerator housing the Willow quantum processor, showing the full cryogenic system scale
The physical reality of superconducting quantum computing: a dilution refrigerator the height of a person, housing the Willow chip at 15 millikelvin — colder than outer space. The cylindrical structure of gold and silver rings is the cryostat, with each layer progressively colder toward the qubit chip at the bottom. Every superconducting quantum processor in operation today requires this infrastructure. Scaling to millions of qubits means solving the engineering challenge of fitting exponentially more control lines, amplifiers, and wiring inside this ultra-cold environment. Source: Google Quantum AI Blog — Our Quantum Echoes algorithm, October 22, 2025

Google's Two-Track Strategy: Superconducting + Neutral Atoms

On March 24, 2026, Google Quantum AI announced it is expanding beyond superconducting qubits to include a neutral atom quantum computing program, led from a new lab in Boulder, Colorado. The strategic rationale — stated by Hartmut Neven — is that superconducting processors excel at scaling in the time dimension (circuit depth, gate speed) while neutral atoms excel at scaling in the space dimension (qubit count, connectivity). Running both programs allows Google to cross-pollinate research breakthroughs and deliver platforms suited to different problem types. This is a significant development: Google's decade-long exclusive focus on superconducting qubits had made it an outlier; IBM, Microsoft, and most academic groups had already been exploring multiple qubit modalities.

Why neutral atoms are attracting investment: QuEra and collaborators demonstrated in 2025–2026 that neutral-atom architectures can achieve 50–100× speedups over what was previously thought possible, by exploiting the platform's unique reconfigurability and long coherence times. Neutral-atom arrays of 6,100+ atoms have been demonstrated with 99.98% single-qubit fidelity — combining ion-level coherence with photonic-level scalability.

Trapped-Ion Qubits — The Fidelity Leader

Quantinuum Helios and Oxford Ionics: Record Fidelity in 2025

Quantinuum's Helios system (November 2025) is the current commercial benchmark for trapped-ion performance. Its 98 barium-137 ions achieve 99.92% two-qubit gate fidelity and 99.95% SPAM (State Preparation and Measurement) fidelity — an order of magnitude improvement in error rate over IonQ's Forte system. The QCCD (Quantum Charge-Coupled Device) architecture physically moves ions between dedicated memory, cache, and logic zones on chip, enabling all-to-all connectivity without the SWAP overhead that plagues fixed-topology superconducting chips.

The 48 logical qubit milestone: In 2025, Helios demonstrated 48 error-corrected logical qubits at a 2:1 physical-to-logical qubit ratio — a remarkable reduction from the ~1000:1 ratio required by surface codes. This was enabled by Quantinuum's QLDPC codes and real-time GPU-accelerated error correction via NVIDIA GB200 integration. Quantinuum set a quantum volume record of 33,554,432 — meaning the system can reliably execute random circuits across 25 qubits with 50%+ success probability.

Oxford Ionics (2025) reached 99.99% two-qubit gate fidelity — the highest reported for any qubit platform commercially. Their approach uses microwave-driven gates rather than laser gates, removing the need for precise optical alignment and making the system more manufacturable. IonQ's fifth-generation Tempo system (100 qubits) entered commercial service in 2025, with a 256-qubit sixth-generation system planned for Q4 2026 targeting 1,600 fault-tolerant logical qubits on its long-term roadmap.

Neutral Atom, Photonic, and Topological Platforms

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Neutral Atoms — 2026's Breakout Platform

Neutral-atom arrays in optical tweezers have scaled to 6,100+ atoms with 99.98% single-qubit fidelity (2026 benchmark). QuEra and collaborators demonstrated 50–100× circuit speedups by exploiting reconfigurability and long coherence. Google's March 2026 entry into neutral atoms confirms the platform's maturity. Microsoft's Magne system — combining Microsoft QEC software with Atom Computing's neutral-atom hardware — is under construction in Denmark, targeting deployment by late 2026 as the world's first operational logical-qubit machine.

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Photonic — Long-Range Vision

PsiQuantum announced Omega in January 2025 — a silicon-photonic chipset architecture for million-qubit systems using standard semiconductor fabs. Xanadu's Borealis (216 modes, 2022) remains the photonic benchmark for quantum advantage demonstrations. Photons do not decohere and operate at room temperature, but deterministic two-qubit gates remain the unsolved challenge. PsiQuantum has raised over $1.3 billion on the thesis that silicon photonics manufacturing can solve the scalability problem no other platform can.

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Topological — Contested but Consequential

Microsoft unveiled Majorana 1 in February 2025: 8 topological qubits using Majorana zero modes in indium arsenide/aluminum nanowires, with a roadmap to a 27×13 tetron array. The long-term target is one million qubits on a single chip with inherent error resilience from topological protection. However, Nature's own reviewers stated the published paper does not constitute evidence for Majorana zero modes, and a 2025 Australian preprint raised decoherence objections. Microsoft disputes these challenges. The DARPA US2QC program is funding Microsoft's fault-tolerant prototype.

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AWS Cat Qubits — The 90% Overhead Reduction Claim

AWS's Ocelot chip (2025), based on cat qubits — superpositions of coherent states in superconducting oscillators — demonstrated bit-flip times approaching one second, over 1,000× longer than conventional superconducting qubits. Cat qubits biased toward one error type allow asymmetric error correction codes that use far fewer physical qubits per logical qubit. AWS claims up to 90% reduction in error-correction overhead compared to surface codes. Ocelot has 5 data qubits, 5 buffer circuits, and 4 ancilla qubits — too small for computation but a compelling proof of concept for fault-tolerant architecture.

The Scalability Challenge — Physical vs. Logical Qubits

THE OVERHEAD WALL — PHYSICAL TO LOGICAL QUBIT COST (2025 BASELINES) Physical Qubits per Logical Qubit 1000 500 100 24 2 ~1000 Surface code (d=31) 24 IBM LDPC Nature 2024 2 Helios 48 logical / 98 phys ~10–50 AWS Ocelot cat qubit claim Lower is better — fewer physical qubits per logical qubit reduces total hardware required Physical Qubits to Break RSA-2048 20M 4M 1M 10K ~20M Fowler 2012 surface code ~4M Gidney 2019 optimised SC ~1M Optimised 2023 improved circuits ~4K Logical qubits needed (floor) Physical qubit estimates include error-correction overhead — even optimistic paths need ~1M fault-tolerant physical qubits Today's best processors: 98–120 physical qubits (noisy) — still orders of magnitude below cryptanalytic threshold
Left: progress in reducing the physical-to-logical qubit ratio. Surface codes require ~1,000 physical qubits per logical; IBM's LDPC code (Nature 2024) reduced this to 24; Quantinuum Helios demonstrated a 2:1 ratio for memory. Right: estimates for breaking RSA-2048 have decreased with circuit optimisation but remain in the millions of physical qubits. The fault-tolerance gap between current hardware and cryptanalytic capability remains large.

The Five Scalability Challenges

What Stands Between Today's Hardware and Cryptographic Relevance

1. Decoherence: All qubit types lose their quantum state through environmental interaction. IBM Nighthawk's 350 μs T1 is a 3.5× improvement over Willow, but fault-tolerant algorithms require executing millions of gate cycles. Trapped-ion seconds-long coherence times set the current ceiling.

2. Error rates and the fault-tolerance threshold: The surface code threshold is ~1% physical error rate. Google's Willow crossed the below-threshold regime in December 2024, demonstrating exponential error suppression from 3×3 to 7×7 arrays. IBM's Nighthawk/Loon combination is targeting the same milestone with improved LDPC codes. Quantinuum Helios's 99.92% two-qubit fidelity (0.08% error) already operates well below threshold.

3. Qubit overhead for error correction: The IBM LDPC breakthrough (Nature 2024) demonstrated 12 logical qubits from 288 physical qubits — a 24:1 ratio vs. the ~1000:1 of surface codes. Quantinuum Helios achieved 48 logical qubits from 98 physical for memory. However, these achievements are for quantum memory; fault-tolerant computation with logical gate operations remains harder and is still being demonstrated.

4. Control system scalability: IBM's move to 300mm wafer fabrication has doubled R&D speed. But scaling from hundreds to millions of qubits requires cryogenic control electronics inside the dilution refrigerator, microwave packaging that avoids crosstalk, and classical decoder hardware capable of processing error syndromes in real time. IBM's AMD FPGA decoder achieving 480 ns syndrome processing is a key milestone for this problem.

5. The cryptanalytic gap: A fault-tolerant Shor's algorithm for RSA-2048 requires ~4,000 logical qubits and ~4 million physical qubits running at high fidelity for several hours. Today's machines are at 98–120 noisy physical qubits. The transition requires not just more qubits but a complete architectural shift to error-corrected logical qubits — a multi-step engineering programme expected to take until the early-to-mid 2030s under optimistic trajectories.

Implications for Cryptographic Security

The 2026 Picture: Progress is Real, But the Gap Remains Large

Google's October 2025 Quantum Echoes milestone and IBM's 2026 quantum advantage target represent genuine scientific progress, not hype. The field has moved from theoretical demonstration to verifiable, reproducible, scientifically useful computation. However, it is important to distinguish what these milestones mean for cryptography: Quantum Echoes ran a 65-qubit subsystem of Willow on a physics simulation task. Shor's algorithm on RSA-2048 requires ~4,000 error-corrected logical qubits. The gap is approximately four orders of magnitude in logical qubit count, plus the full engineering stack for fault tolerance.

The timeline consensus is tightening: In 2025–2026, multiple credible organisations — IBM (2029 fault tolerance target), Google, and Quantinuum — have given specific timelines for fault-tolerant quantum systems. The broad industry consensus has shifted from “decades away” to “late 2020s to early 2030s for first commercially useful fault-tolerant systems.” Cryptographically relevant systems — capable of running Shor's algorithm at scale — follow after that, likely mid-2030s under optimistic assumptions.

Harvest Now, Decrypt Later: Even though current quantum hardware cannot break RSA, adversaries may be recording encrypted traffic today to decrypt it once a capable quantum computer exists. Data with long secrecy requirements — classified communications, medical records, financial transactions, intellectual property — is already at risk from this strategy. NIST finalised the first three PQC standards in August 2024 (ML-KEM, ML-DSA, SLH-DSA) and added HQC as a backup KEM in March 2025. Migration should be underway now.

The 2025–2026 hardware frontier in one paragraph: IBM Nighthawk (120 qubits, T1 = 350 μs, 300mm fab) targets quantum advantage by end of 2026. Google Willow achieved the first verifiable quantum advantage (Quantum Echoes, October 2025) and launched a neutral-atom program (March 2026). Quantinuum Helios demonstrated 99.92% two-qubit fidelity and 48 logical qubits at 2:1 overhead. Oxford Ionics reached 99.99% two-qubit fidelity. AWS Ocelot introduced cat qubits with 90% claimed overhead reduction. Microsoft's Majorana 1 topological qubits remain contested by the scientific community. Neutral atoms scaled to 6,100+ qubits with record fidelity. The fault-tolerant cryptanalytic threshold remains approximately 3–4 orders of magnitude away in logical qubit count.

Resources & Further Reading

Resources

Further Reading

The Fault-Tolerance Timeline

IBM targets fault-tolerant quantum computing by 2029 with its Starling system (1,000 qubits, 200 error-corrected logical qubits, 100M operations/job). Google targets commercially useful fault-tolerant systems by end of the decade. Quantinuum's roadmap targets 1,000 logical qubits in the early 2030s. Cryptanalytically relevant Shor's algorithm — requiring ~4,000 logical qubits — follows after these milestones, likely mid-2030s under optimistic assumptions.